Strong BS in Electrical Engineering. Employment background in analog descretes, IC design, C/mathcad/labview programming, automated test & measurement. Seeking employment in a hardware oriented, technically varied & mathematically challenging engineering position with opportunities for intense human valued contribution.
New York City - 2006 to Present
Transit Systems Consultant for: Metro-North Railroad, Philadelphia SEPTA, NYCity Transit, Edmonton Transit Systems-Light Rail, Denver Mitsubishi Electric Corporation, Denver Eagle P3, Los Angeles Metro and Chicago Metra.
Areas of deep Involvement: Regeneration Energy Improvement Project for NYCity Transit yield signficant regeneration improvement options, Electro Magnetic Compatibility assesments and fixes involving AC Drive harmonics affect on switching and on board signalling equipment as well as sensitive MRI medical equipment in nearby Hospitals. Extensive wayside and vehicle test instrumetation, data analysis and report generation. Often involved in coordination with both suppliers and transit dristrict personnel. Coauthored conference paper- Regeneration Improvement for NYCity Transit, APTA 2008.
Senior Design Engineer - Advanced Micro Circuits Corp. / YuniNetworks
San Diego, CA: 1/2000 to 6/2004
Verification lead for a 0.13um 2.5Gbps CMOS serial transceiver(SERDES). Transistor-level design of a low power CML output buffer. Specification & design of a high performance 10GHz CMOS PLL, including mathcad model creation and differential charge pump design. Lead architect for a 30Mbps-3Gbps rate-sensing CDR. Design lead for two generations of 80Gbps crossbar switch IC for use in a terabit-scalable switch fabric. Created a template for a design specification for multi-million gate ICs used across the entire product line. Created a product development plan for the ICs to assess the required resources to develop the product schedule.
Research Assistant - UCSD Integrated Signal Processing Group: 11/98-12/99 Analysis and simulation of a linearization technique for fractional-N frequency synthesizers. Software development of a C model for an audio-band delta-sigma DAC. SPICE verification. Lab testing of a high performance audio ADC. Debugged and enhanced embedded software for a digital data capture board. A DOS-based C program was responsible for configuration and control of the board as well as transfer and storage of several MB of digital data. Wrote matlab scripts to analyze the collected data.
Engineering Intern - Lawrence Livermore National Labs, Livermore, CA: 6/98-9/98 Software and hardware development for a hand-held micropower-impulse-radar imaging system. Wrote real-time data acquisition and imaging software in Labview and C and evaluated a wireless position sensor for use with the system. Created a prototype and developed a SPICE model for a 5GHz pulse generation circuit. Presented results managers.
Research Assistant, UCSD Asynchronous VLSI Lab: 3/97-6/97,
Assisted graduate students on video compression and packet switching research. Designed & coded a Windows-based C++ visual interface to an architectural simulator of a scalable packet switch. Created VHDL models of portions of the proposed architectures.
Assistant Engineer, Acuson, Mountain View, CA: 6/97
Revised and updated documentation for a signal-processing IC. SPICE modeling, schematic entry, PCB layout support, prototype creation & testing of a 20MHz discrete MOSFET discrete device analog RF super-linear amplifier.
Teaching Assistant, UCSD ECE Department, San Diego, CA:
10/96 - 12/96
Created and administered lab quizzes, tutored and assisted students struggling with lab experiments, graded lab notebooks.
Assistant Test Engineer, Acuson, Mountain View, CA: 6/96
Prototyped CRT Monitor test fixture hardware. Developed and documented a procedure for CRT testing and calibration on the production line. Debugged and enhanced several test engineering software tools.
BSEE, UC San Diego, Revelle College, March 2000, Magna Cum Laude
Special Coursework: Focus was on circuits, system design, software programming & DSP. Three Quarters of graduate coursework in analog circuit design. Five Quarters of humanities.
Awards & leadership: UC Regents Scholarship, Phi Beta Kappa, Tau Beta Pi, Provost's Honors List, Golden Key Honor Society, Captain- Sailing Team, UCSD
CAD Skills Cadence IC/PCB design tools, Verilog, Matlab, Mathcad, , Synopsys, ASIC design tools, C/C++, Windows programming, Labview, PSPICE, PSIM, JAVA, Auto-CAD. Most electronic test equipment (BERTs, DSOs, spectrum analyzers, pattern/signal generators)
20th-century art & literature, jazz, architecture & urban planning, travel, sailing; Gallery Creator/Owner of Fuze Gallery San Diego, 4/02-2/04; Principal Architect for Brooklyn Brownstone remodels.